Winning together

Flex Logix™ has developed reconfigurable RTL IP cores and software for you to make superior, successful SoCs. We have proven our architecture in silicon.

Flex Logix provides:

Physical design and logic design files for the array size you want, in the process you want: GDS, LIB, LEF, Verilog;

Training and assistance in architecture, integration, test, and whatever else is needed to win;

EFLX Compiler  for resource estimation, timing analysis and bitstream generation.

Flex Logix charges a license fee for the delivery of the design files and tools, an annual license fee for the ongoing use of the EFLX Compiler for reprogramming, and a royalty.

We are interested in a long term business relationship with you.  We will consider discounts for an initial architectural evaluation chip that leads to a product and other innovative ways to get started together.