Improve Debugging and Configuration Management using embedded FPGA

Silicon debugging is challenging as visibility inside the device is limited to a small subset of predefined signals routed through a big MUX to a debug port.

The Debug module will typically have significant routing congestion limiting the number of signals that are wired in to a subset of what is desirable.

The Configuration and Management module has similar connections as the Debug module.

Integrating the Configuration and Management modules into one using embedded FPGA reduces routing congestion and increases flexibility of signal selection from a wider range.  Using embedded FPGA can also enable implementation of complex event triggers that can help capture and filter relevant events like an internal logic analyzer.

Click here to read the App Note including detailed examples.

eFPGA debug.jpg
logic analyzer output.png