Now make your MCU & SoC Flexible with Embedded FPGA

Today's MCU's and SoC's have hardwired accelerators in some variations - but this costs increasing $ for expensive masks, requires a year+ for design and qualification, and still only provides customers with a small fraction of possible accelerators.

Now you can embed FPGA in your MCU/SoC to accelerate tasks faster than your processor, reconfigurable, and reconfigure/program I/O processing.  

Making the accelerator reconfigurable makes it possible to accelerate multiple tasks, as the workload requires or as different customers/applications demand. Acceleration of 40-140x is achievable in the examples studied in our application note: see HERE.
And embedded FPGA can allow serial I/O to be programmed rather than hardwired, in order to handle the wide diversity of options customers requires: see HERE.

Flex Micro Concept Design & Evaluation Board

flex micro with GPIO from accelerator.png

Flex Logix has developed a Flex Micro concept Design combining 1) an ARM Cortex-M0, 2) Silvaco peripherals and bus IP, 3) embedded FPGA for reconfigurable acceleration and/or programmable I/O.  

The Flex Micro design is implemented on our EFLX200K array with 182K LUT4's, 560MACs (22x22 multiply) and >2Mbits attached SRAM plus PVT monitors and PLL.

The EFLX200K is just out of packaging so validation will take another month or two to complete all tests over temperature and voltage, but initial single stage logic tests (inverter chain with >90% of all of the 182K LUTs utilized) show performance >1GHz at 25C.  Complex designs with more stages will run slower.  The EFLX Compiler for TSMC16FFC is available now with multiple process corners to show performance for your RTL: available at no cost for evaluation.

In the week+ since we got packaged parts on boards we have been able to get the Flex Micro concept design working with AES acceleration which we will demonstrate at ARM TechCon October 25+26.

CLICK HERE FOR A 2-PAGER ON THE FLEX MICRO CONCEPT DESIGN AND EFLX200K EVALUATION BOARD.

By December/January, we should have the full board, multiple acceleration examples, debugger and complete software tools ready for customer use to breadboard their own flexible MCU and SoC architectures.

 

 

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