Optimizing RTL Code for EFLX
Most of our customers are chip designers used to hardwired RTL.
Our Architecture Solutions and Applications team has been working closely with many of our customers in helping them use embedded FPGA in applications from IoT to Networking.
In the process, our team has noted many suggestions for our customers to make the porting of their RTL to EFLX easier, higher performance and higher density.
These suggestions are collected in an app note: click here to download "Optimizing RTL Code for EFLX".
If you are interested in exploring embedded FPGA we can help you in several ways:
1. Our Architecture Solutions/Applications engineers can meet with you in person or by web-ex to review your needs and suggest solutions.
2. Our EFLX Compiler software is available for a free evaluation license so you can see how your Verilog or VHDL code ports to EFLX in terms of number of LUTs and frequency (will vary of course with the process technology and how much you have optimized your RTL).