See FLEX LOGIX™ at gomac tech (government microcircuits technology conference), Reno, 21+22 March 2017
Follow us on Twitter @efpga or Linked-in for the latest news on Flex Logix.
Embedded FPGA for Architects & Physical Designers
Here is a link to the PDF of our keynote talk last week at REUSE2016: Embedded FPGA for Architects & Physical Designers.
Flexible, Proven Building Blocks: We Deliver More, Sooner
Our management team has the experience to grow Flex Logix rapidly while meeting commitments. Our engineers have worked at many of the world's best chip companies on processes from 180nm to 7nm designing high volume ICs. We can meet your needs and we will meet our commitments.
We prove our Hard IP in Silicon before you use it. We execute effectively and quickly: in 2.5 years we have designed EFLX™ in TSMC 40, 28 and 16FF. Our lead customers have their chips working with EFLX arrays embedded.
We can port to any CMOS process, foundry or captive, in 4-6 months from receipt of PDK and standard cell library -- we only port with a committed customer to ensure we have a partner to help us optimize our digital architecture for the target process. For example, in 40ULP we optimized for numerous power management modes with rapid transitions, 0.5V state retention and even 0.5V operation if needed. Whereas in 16FF customers want performance, performance, performance. In all nodes it is the same digital architecture with the same programming software.
In each process node we implement up to 4 IP cores: EFLX-100 and EFLX-2.5K; each has an all-logic version and a version with embedded Multiplier-Accumulators for DSP Acceleration. Each IP core is a stand-alone FPGA, but incorporates additional top-level interconnect which allows automatic connection to adjacent IP cores turning them automatically into larger EFLX arrays.
Our innovative building block approach means we can deliver any size embedded FPGA from 100 LUTs to 100K LUTs, with about 75 sizes in between: and each size can be further customized with the mix of DSP acceleration and/or RAM that you might also need.
Join our other customers who are designing with EFLX embedded FPGA. Check out our Experience page.
Reconfigure your RTL in chip and in system whenever you want
Make one chip look like dozens: save the time and costs of multiple mask sets.
Allow your chip to be able to upgrade to handle new standards and specs: your chip will have a longer life and be more valuable.
We provide embedded FPGA to make this possible: any process, any size, optional DSP/RAM and programming software.
Easy & More Powerful Pin-Muxing
Most chips have pin mux-es. They are important but tedious and prone to human error. EFLX™ makes it easy AND easy to wire many more signals into the pin mux for great observability. Check out our IO Multiplexing page.
Extended Battery Life for IoT and Microcontrollers
Many times we hear "but FPGAs are high power" - maybe the chips are, but embedded FPGA can be very energy efficient. Tony Kozaczuk, our new Director of Solutions Architecture, has done an analysis showing that for the DSP functions he analyzed, a small EFLX array can take 2-5x less energy than an embedded processor (and that's before considering the energy for the ARM memory accesses), and executes faster as well. So an EFLX array can be used to do the repetitive DSP functions in a battery-backed chip, only waking up the processor for more complex tasks. See Tony's analysis on this page, with a link to the slide deck: set up a call with Tony to discuss your application: email email@example.com.
Flexible, Reconfigurable I/O for Microcontrollers & IoT
Tony Kozaczuk, Director of Solutions Architecture, joined us 3 months ago from Intel where he was Lead Systems Architect for multiple CPUs and before that an architect at Sun. He has now produced his 2nd application note showing how to connect EFLX™ to the APB bus and implement GPIO ports and serial interfaces in reconfigurable RTL, enabling one 40nm mask set to support dozens of different customers requested variations in GPIO/serial interfaces (and quickly). Check out the app note on this page: Flexible I/O.
(Re)Configurable Clouds will change the world
Doug Burger, Microsoft talks about how the ability to reprogram a datacenter's hardware protocols (networking, storage, security) is a game changer: click here for his presentation at FPL2016.
EFLX™ embedded FPGAs give you the capability to implement reconfigurability in your Networking & Communications SoCs. We have EFLX available now in TSMC28HPM/HPC and very soon in TSMC16FF for your new designs.
EFLX™ for TSMC 40ULP in Validation
EFLX-100 Logic and DSP cores in multiple VT combinations are available now for integration in MCU, IOT and other ICs.
A validation chip will prove out all 10 versions of the EFLX-100 core: we have just received it back and are about to begin test. See our TSMC 40ULP page for information on the validation chip.
EFLX™ for TSMC 16FF+ & 16FFC in Design
We are in development of EFLX-100 and EFLX-2.5K embedded FPGA cores for TSMC 16FF+/FFC.
EFLX-100 for TSMC 16FF+ will be available first; then, EFLX-100 and EFLX-2.5K for TSMC 16FFC will be available in the first half of 2017. More information is available under NDA.
EFLX™ for TSMC 28HPM/HPC Proven in Silicon
TSMC 28 page here. Ask to see our validation report, under NDA. TSMC 28HPC+ is expected to be available in 2017: ask us about it.
EFLX™ Compiler - try it yourself!
Our software, the EFLX Compiler, converts your RTL into a bit stream which you load into the EFLX FPGA array to program it to run your RTL including DSP and Block RAM. The EFLX Compiler is in use at our lead customers and is now available for evaluation for qualified customers: contact us at firstname.lastname@example.org.
Need a summary to circulate to the team?
Download our 4-page PDF overview of our technology and company: click here to get the PDF.
Download our 2-page product brief on the EFLX-100 logic/DSP core for TSMC 40ULP/LP: click here to get the PDF.
Download our 2-page product brief on the EFLX-2.5K logic/DSP core for TSMC 28HPM/HPC: click here to get the PDF.
Download our DSP Technology Overview which explains the DSP core features for EFLX-100 and EFLX-2.5K: click here for PDF.
Now you can evaluate EFLX™ at low risk and low cost
Architects, Front End Designers, Physical Design teams all need to become familiar with Reconfigurable RTL. Now you can dig into the details before committing to a product chip.
Flex Logix™ offers a Fast Track prototyping license for $50K to design and build a prototype using one of our EFLX cores in TSMC 40ULP/LP or TSMC28HPM/HPC. Check out the details at Fast Track.
Help us make the world a more flexible place!
We are hiring: engineering, applications, sales. See our careers page. We want great people who want to make a difference.
Copyright © 2015&2016 Flex Logix Technologies, Inc. EFLX and Flex Logix are Trademarks of Flex Logix Technologies, Inc.