See us AT flash memory summit, santa clara, Ca, 9-11 august
& at HOT CHIPS 2016, Cupertino CALIFORNIA, 22+23 AUGUST
& AT TSMC Open Innovation Platform Forum, San Jose, 22 SEPTEMBER
& AT ARM TECHCON 2016, SANTA CLARA, 26-27 OCTOBER.
Reconfigure your RTL in chip and in system whenever you want
Now you can keep your protocol, encryption, digital front end, etc bug free and up to date with the latest standards and customer/market needs. Also use EFLX as a reconfigurable accelerator or customizable block to tune your SoC to your customers' needs. This can improve your chip value and your customer's system value - consider a new business model: charging for value added upgrades.
We provide a total solution: an array of any size, thousands of I/O's, optional DSP acceleration, optional RAM of any size/kind, multiple clocks and software that maps your RTL into the EFLX array you specify.
For a simple but detailed example, check out our IO Multiplexing page.
EFLX Compiler - try it yourself!
Our software, the EFLX Compiler, converts your RTL into a bit stream which you load into the EFLX FPGA array to program it to run your RTL including DSP and Block RAM. The EFLX Compiler is in use at our lead customers and is now available for evaluation for qualified customers: contact us at firstname.lastname@example.org.
TSMC EFLX Roadmap
Our complete architecture is available now in TSMC 28HPM/C and is being integrated now by customers into chips. We are now in development of a version for TSMC 40LP/ULP. We expect TSMC 28HPC+ and 16FF+ will be next.
Need a summary to circulate to the team?
Download our 4-page PDF overview of our technology and company: click here to get the PDF.
Download our 2-page product brief on the EFLX-100 logic/DSP core for TSMC 40ULP/LP: click here to get the PDF.
Download our 2-page product brief on the EFLX-2.5K logic/DSP core for TSMC 28HPM/C: click here to get the PDF.
Download our DSP Technology Overview which explains the DSP core features for EFLX-100 and EFLX-2.5K: click here for PDF.
Now you can evaluate EFLX at low risk and low cost
Architects, Front End Designers, Physical Design teams all need to become familiar with Reconfigurable RTL. Now you can dig into the details before committing to a product chip.
Flex Logix offers a Fast Track prototyping license for $50K to design and build a prototype using one of our EFLX cores in TSMC 40ULP/LP or TSMC28HPM/C. Check out the details at Fast Track.
Help us make the world a more flexible place!
We are hiring: engineering, applications. See our careers page for jobs in Silicon Valley for great people who want to make a difference.
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