Fast Reconfigurable Control Logic
Chips that can adapt and evolve as standards and specs change will make your customers more successful and extend the life of your chips (and your customers' systems).
As Doug Burger of Microsoft recently said at FPL2016: "Reconfigurable Clouds [are] the Dawn of a New Era" & "Configurable Clouds will change the world [with] the ability to reprogram a datacenter's hardware protocols: networking, storage, security."
The key is to partition your control path in to the part that remain hard-wired and the part that needs to be reconfigurable. The less logic that is reconfigurable, the faster it can run. Unlike FPGA chips, you have the option of distributing embedded FPGA in multiple blocks across your chip.
For maximum frequency, design your logic to be single stage: one logic stage between flip-flops. In EFLX reconfigurable logic blocks, the building block is a Look-Up-Table (LUT) with 4 inputs that can be configured to implement any Boolean function. LUTs can be combined to form up to the equivalent of a 8-input LUT in a single logic stage. Each logic stage is paired with a flip-flop, so pipelining is "free": the flip-flop is already in the EFLX block whether you use it or not. (Arithmetic is also possible in addition to Boolean functions).
In TSMC 28HPM/HPC single-stage logic runs at >500MHz worst case (we can demonstrate this on our validation silicon and we can give you evaluation software to see how fast your RTL runs). We estimate performance in TSMC 28HPC+ will be ~30% faster.
In TSMC 16FF+ we estimate single-stage logic will run ~1GHz+ worst case: the validation silicon is in fab. We are in design now of TSMC 16FFC.
Of course, the specifics will vary based on what you are doing: contact us at email@example.com to discuss your specific application and to get a free evaluation license for the EFLX Compiler so you can check performance for your specific RTL.
For small chunks of control logic, the best building block is probably the EFLX-100 reconfigurable core which has 96 LUTs and 224 inputs/224 outputs. It can be arrayed up to 5x5 for more logic and I/O as needed for your control logic needs: up to 3000 LUTs in a 5x5 array with >1000 inputs and >1000 outputs. (NOTE: this is slightly different than the EFLX-100 in TSMC40LP/ULP which is optimized for other uses with more logic and less I/O).
In TSMC28HPM/HPC a single EFLX-100 core is ~.06mm2.
Look through the rest of this web site for much more information. Contact us at firstname.lastname@example.org to discuss how we can help you make your critical control logic reconfigurable.